IBM Reveals Chip Technology to Extend Performance by Another Decade

IBM has unveiled new chip technology that could extend 'Moore's Law' by another decade. 'Moore's Law' predicts that the number of components (transistors) on a chip will double approximately every two years, leading to performance improvements. In the past, chip manufacturers achieved this by shrinking components to fit more onto a chip, but they are now reaching their limits. IBM aims to overcome this challenge by stacking components in a three-dimensional manner, moving beyond the conventional planar approach.

IBM's new technology proposes a novel way to increase chip performance by stacking more components on top of the chip. Through its recently announced 0.7-nanometer (nm) prototype chip, IBM has succeeded in integrating approximately 100 billion transistors within an area the size of a fingernail. This represents a doubling of integration density compared to IBM's previous technology announced in 2021.

The new chip architecture, dubbed 'nanostack,' features a structure where transistors are vertically stacked on a silicon chip. In a press conference, IBM Research Director Jay Gambetta stated that this technology represents a 'meaningful leap.' IBM revealed that chips manufactured using this new approach can process 50% more tasks in the same amount of time and improve energy efficiency by up to 70%.

The IBM Research Director hailed the technology as a 'meaningful leap' and anticipates its widespread adoption, particularly in data centers. This vertical integration approach is not exclusive to IBM; major chip manufacturers like Intel, Samsung, and TSMC, as well as the Belgian research institute Imec, are pursuing similar research. IBM's latest technological development underscores the accelerating industry-wide efforts to overcome the limits of transistor miniaturization and continue advancing chip performance.